Ion implantation is a standard technique for introducing conductivity-altering impurities into a silicon device such as a transistor. A desired impurity material is ionized in an ion source, the ions are accelerated to form an ion beam of prescribed energy, and the ion beam is directed at the surface of the workpiece. The energetic ions in the beam penetrate into the bulk of the workpiece material and are embedded into the crystalline lattice of the workpiece material to form a region of desired conductivity. In a Complementary MOSFET (CMOS) technology, the ion implantation process will generally be performed on semiconductor wafers, on which certain area have been protected by a photolithographic resist. Using this standard technique, the only areas that will receive the ion implantation are the areas that are not covered by the photolithographic resist.
The process of ion implantation is well known to cause some amorphization damage in the context of FinFET devices. The conventional solution used in the industry, is the so-called Hot Implant solution, in which a chuck is heated at typically 400° C. during a conventional ion implantation. Hot implantation is currently utilized for FinFET doping without damaging the Fin through amorphization. The major downside of this approach is that the photolithographic resist may not be compatible with a 400° C. temperature. The resist that are used in the industry can generally withstand temperatures up to 200° C. When submitted to higher temperature bake, the organic based resist simply melt or evaporate, leaving some organic contamination on the wafer. This is a greater concern with hot chuck anneals or lamp based anneals, that have an annealing time ranging between one second and several minutes. The inventors have determined that the resist may withstand much higher temperatures when using a laser annealing process. Using a laser annealing brings the wafer up to a temperature of about 400 C during a typical timescale of 1 ms.